The present invention relates generally to thin film transistors (“TFTs”), and more particularly, to a method for manufacturing TFT arrays.
With the progress in semiconductor manufacturing techniques, the panel size of flat panel display devices such as liquid crystal display (“LCD”) devices has been increasing rapidly. As a result, the conductive lines in a flat panel device have gained a considerable increase in length, adversely resulting in an undesirable resistor-capacitor (“RC”) delay. Such an RC delay may severely impact the performance of the flat panel device. For LCD TVs having a 37-inch or greater panel size, the RC delay within the scan lines has been found to adversely affect the display quality. One of conventional methods to address the RC delay issue proposes a two-sided driving scheme, wherein both sides of a panel are provided with drivers in order to offset or alleviate the RC delay. However, this method requires additional driving integrated circuits (“ICs”), and in turn the additional cost for packaging these ICs. Consequently, it is desirable to have a method for manufacturing TFT arrays that is able to reduce RC delay in the conductive lines in the TFT arrays without compromising the driving scheme.